There is a move to provide lower and lower fluctuation of threshold voltages Vt in transistor devices. One method of lowering Vt fluctuation is to stack extremely low impurity concentration channel layer over a very high impurity concentration layer. However, the cost in doing so results in increasing junction leakage that may negatively impact device operation. One way to minimize junction leakage is to minimize the thickness of the high impurity concentration layer and to set source and drain regions penetrating the high impurity concentration layer and thus minimize junction area between source and drain regions and Vt control. However, deep source and drain regions penetrate through the Vt control causing punch-through. Punch-through is associated with the merging of source and drain depletion layers, when the drain depletion layer extends across the substrate and reaches the source depletion layer to cause a destructive conduction path or leakage current between the source and drain.